1. Field of the Invention
This invention relates to gallium arsenide (GaAs) or indium phosphide (InP) integrated circuits for shifting low logic levels characteristic of high speed digital components (such as ECL or GaAs memories) to large swings suitable for analog control signals. In particular this invention relates to such GaAs or InP circuits employing only depletion mode metal-semiconductor field effect transistors (MESFETS) and Schottky diodes in Schottky diode field effect transistor logic (SDFL) configuration.
2. Prior Art
The high switching speeds available with GaAs integrated circuits have been advantageously employed in a logic circuit approach called SDFL as disclosed in U.S. Pat. No. 4,300,064 issued to Eden. Further, Ransom, et al in U.S. Pat. No. 4,410,815 disclose a high speed GaAs integrated circuit which converts the relatively low GaAs input or source signals to voltage levels for directly driving ECL circuits. Ransom, et al input true and complement logic signals through Schottky diode level shifting networks to generate dual inputs to a depletion mode MESFET differential amplifier which in turn drives a depletion mode MESFET source follower output stage. Logic level converters or interfaces which require true and complement logic signals for operation require gates to invert the true signal. The added gates take up additional space, complicate chip processing and can slow the throughput of logic signals in the circuit.
Heretofore, however, no GaAs or InP integrated circuit has been disclosed which effectively utilizes the inherent speed capability of GaAs or InP to provide drive voltages particularly suited for analog devices wherein both true and complement logic signals are not needed as the input signal to the interface circuit.